China Unveils First Near-Memory Computing 3D AI Chip to Bypass US Manufacturing Constraints
Shanghai-based startup Dongfang Suanxin has introduced a 3D-stacked AI chip that achieves high performance on a mature 14nm process. The architecture aims to bypass US export controls by substituting advanced lithography and restricted memory with innovative vertical packaging.
By Factlen Editorial Team
- Chinese Semiconductor Industry
- Views advanced packaging and architectural innovation as the definitive path to AI sovereignty.
- US Export Control Advocates
- Concerned that advanced packaging represents a critical loophole in current sanction regimes.
- Independent Hardware Analysts
- Acknowledges the theoretical brilliance but remains skeptical of thermal management and high-volume yield rates.
What's not represented
- · Dutch lithography equipment manufacturers
- · Taiwanese advanced packaging foundries
Why this matters
If Chinese chipmakers can successfully use 3D packaging to achieve cutting-edge AI performance on older manufacturing nodes, it would fundamentally undermine the effectiveness of US export controls. This shift could move the geopolitical battleground from lithography machines to advanced packaging equipment.
Key points
- Shanghai-based Dongfang Suanxin unveiled the DF1000, a 3D near-memory computing AI chip.
- The chip uses a mature 14nm process, bypassing US restrictions on sub-7nm lithography.
- It achieves 6.4 TB/s memory bandwidth by vertically stacking memory, avoiding reliance on restricted HBM.
- The chip relies on a 100% domestic supply chain, utilizing SMIC for manufacturing and JCET for packaging.
Shanghai-based startup Dongfang Suanxin recently unveiled the DF1000, China's first software-defined near-memory computing 3D AI chip, at the 2026 World Artificial Intelligence Conference.[1][2]
Washington's export controls have successfully restricted China's access to sub-7nm extreme ultraviolet lithography and advanced High-Bandwidth Memory, the two critical components of modern Western AI accelerators.[4][5]
Instead of fighting a losing battle on transistor shrinkage, Chinese engineers are pivoting to advanced packaging. The DF1000 claims to achieve high-end AI performance using a mature 14nm process, effectively bypassing the need for restricted manufacturing equipment.[1][3]

CLAIM 1: Bypassing the Lithography Bottleneck. Dongfang Suanxin asserts the DF1000 delivers 520 TFLOPS of BF16 compute power entirely on a 14nm node.[2][3]
EVIDENCE ASSESSMENT: The theoretical foundation is strong. The chip relies on a software-defined architecture developed over two decades at Tsinghua University by founder Wei Shaojun, which dynamically reconfigures on-chip resources to maximize hardware utilization and compensate for the older node.[1][4]
CLAIM 2: Shattering the Memory Wall without HBM. The company claims a memory bandwidth of 6.4 TB/s, exceeding some cutting-edge Western chips, without using restricted High-Bandwidth Memory.[3]
EVIDENCE ASSESSMENT: This is achieved via 3D near-memory computing. By vertically stacking DRAM directly above and below the logic compute units using wafer-level hybrid bonding, the data travel distance is compressed to sub-micrometer levels, drastically reducing latency.[3][5]
Academic preprints from the Chinese Academy of Sciences corroborate this approach, showing that hybrid-bonded through-silicon vias can reduce energy consumption by up to 93 percent and accelerate transformer workloads by over seven times compared to standard 2D baselines.[4][6]

CLAIM 3: A Fully Sanction-Proof Supply Chain. The company states the DF1000 is manufactured entirely within China, utilizing SMIC for the 14nm foundry work and JCET for the 3D packaging.[4][5]
The company states the DF1000 is manufactured entirely within China, utilizing SMIC for the 14nm foundry work and JCET for the 3D packaging.
EVIDENCE ASSESSMENT: This claim is highly credible. Both SMIC and JCET possess mature, proven capabilities in these specific domains. By deliberately avoiding nodes smaller than 14nm, the production line requires no restricted ASML extreme ultraviolet lithography machines.[4]
AREA OF UNCERTAINTY: Thermal Management. While the architectural theory is sound, the physical reality of 3D stacking presents severe thermal challenges. Stacking logic and memory vertically traps heat, a notorious problem in dense silicon.[3][4]
EVIDENCE ASSESSMENT: Independent analysts note that Dongfang Suanxin has not yet published detailed thermal dissipation metrics or real-world continuous-load benchmarks for the DF1000, leaving its sustained performance under heavy AI workloads an open question.[4]
AREA OF UNCERTAINTY: Yield Rates and Commercial Scaling. The DF1000 is currently a prototype and proof-of-concept, with mass production slated for the fourth quarter of 2026.[1][5]
EVIDENCE ASSESSMENT: 3D hybrid bonding is notoriously difficult to scale with high yields. Defect rates compound when multiple dies are stacked; if one layer fails, the entire package is discarded, which could drive up costs and limit availability.[4]

The broader industry context validates the strategy. The DF1000 is not an isolated anomaly but part of a systemic Chinese pivot. Companies like Huawei, Tsingway, and Suanmiao Technology are all actively taping out 3D-stacked architectures.[1]
This collective shift suggests Beijing has quietly concluded that the next phase of the semiconductor war will be fought over advanced packaging, not just lithography.[4]
How we got here
May 2024
Dongfang Suanxin is founded in Shanghai by Tsinghua University professor Wei Shaojun.
October 2025
US tightens export controls on advanced AI chips and HBM memory to China.
April 2026
Dongfang Suanxin completes a $1.7 billion Series A+ funding round backed by state funds and tech giants.
July 13, 2026
The DF1000 chip is officially unveiled at the World Artificial Intelligence Conference in Shanghai.
Q4 2026
Targeted timeline for the DF1000 to enter commercial mass production.
Viewpoints in depth
Chinese Chipmakers' View
Advanced packaging is the definitive path to AI sovereignty.
Chinese semiconductor executives argue that the obsession with shrinking transistor sizes is reaching physical limits anyway. By pioneering 3D stacking and software-defined architectures, they believe China can build a self-sustaining ecosystem that renders Western lithography embargoes irrelevant, turning a supply chain constraint into a catalyst for architectural innovation.
US Policymakers' View
Export controls may need to expand to cover advanced packaging.
For Washington, the emergence of chips like the DF1000 highlights a critical loophole in the current sanction regime. While the US successfully choked off extreme ultraviolet lithography, China's rapid advances in wafer-level packaging and hybrid bonding suggest that future export controls might need to target the equipment and materials used to stack and connect mature chips, not just the machines that print them.
Hardware Analysts' View
Theoretical breakthroughs must survive the brutal realities of mass production.
Independent silicon analysts acknowledge the elegance of the DF1000's design but remain cautious about its commercial impact. They point out that 3D hybrid bonding introduces severe thermal dissipation challenges and compounding defect rates. Until Dongfang Suanxin proves it can manufacture these chips at scale with high yields and stable thermals, the architecture remains a brilliant prototype rather than a market-shifting product.
What we don't know
- How effectively the DF1000 manages the severe thermal dissipation challenges inherent in 3D stacking.
- Whether SMIC and JCET can achieve high enough yield rates to make the chip commercially viable at scale.
- If the US Commerce Department will respond by placing new export controls on advanced packaging equipment.
Key terms
- Near-Memory Computing
- An architecture that places memory components directly alongside or on top of processing units to reduce the time and energy spent moving data.
- 3D Stacking / Hybrid Bonding
- An advanced packaging technique that vertically stacks multiple silicon dies (like logic and memory) and connects them with microscopic vertical wires.
- Memory Wall
- The performance bottleneck caused when a processor's speed outpaces the speed at which data can be transferred to and from the memory.
- 14nm Process
- A mature semiconductor manufacturing node that can be produced using older DUV lithography equipment, which is not subject to the strictest US export bans.
Frequently asked
Does this chip beat Nvidia's latest GPUs?
In raw compute, no. However, its 6.4 TB/s memory bandwidth is highly competitive, and its main achievement is delivering viable AI performance without using any US-restricted technology.
How does it bypass US sanctions?
By using a mature 14nm manufacturing process that China can produce domestically, and substituting restricted high-bandwidth memory (HBM) with vertically stacked standard memory.
Is the DF1000 available now?
Currently, it is a prototype that won top honors at the 2026 World Artificial Intelligence Conference. Mass production is targeted for late 2026.
Sources
[1]South China Morning PostChinese Semiconductor Industry
A new Chinese AI chip start-up is betting on 3D stacking to bypass US
Read on South China Morning Post →[2]China DailyChinese Semiconductor Industry
First-of-its-kind Chinese AI chip debuts in Shanghai
Read on China Daily →[3]WccftechIndependent Hardware Analysts
DF1000 - China's First 3D DRAM-Powered AI Accelerator Made Using a Domestic Supply Chain
Read on Wccftech →[4]Model DiplomatUS Export Control Advocates
China's Dongfang Suanxin bets on 3D stacking to bypass US chip curbs
Read on Model Diplomat →[5]Crypto BriefingIndependent Hardware Analysts
The Chinese AI chip startup betting on near-memory computing to sidestep Washington
Read on Crypto Briefing →[6]arXivIndependent Hardware Analysts
Energy-Efficient 3D Hybrid-Bonded Near-Memory Computing for Transformer Workloads
Read on arXiv →
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