Silicon Spin Qubits Achieve 99.9 Percent Fidelity in Simultaneous Five-Qubit Operation

Researchers at Japan's RIKEN Center for Emergent Matter Science have cleared a stubborn engineering roadblock in semiconductor quantum computing. By operating five silicon spin qubits simultaneously on a single microwave control wire, the team maintained a gate fidelity of 99.9 percent. This marks the first time a silicon array has sustained fault-tolerant accuracy during fully parallel operation.[1][2]

The breakthrough, published in Nature Physics on October 15, 2026, directly addresses the wiring bottleneck that threatens to limit the size of future quantum processors. The research team included collaborators from National Taiwan University, ETH Zurich, and TU Delft. Together, they demonstrated that shared control lines do not inherently sacrifice the precision required for quantum error correction.[1][3]

Silicon spin qubits store quantum information in electron spins confined within nanoscale structures called quantum dots. They are highly prized by the industry because their transistor-like footprint means they can be manufactured using existing semiconductor foundry techniques. This compatibility offers a theoretical path to fabricating processors with millions of qubits on a single chip.[2][4]

However, manufacturing compatibility alone cannot deliver a useful quantum computer. To run the cyclic protocols required for quantum error correction, a processor must operate many qubits simultaneously. Idle silicon spin qubits lose their quantum state—a process called dephasing—in about 10 microseconds, which is significantly faster than the 100 microseconds it takes for driven qubits to dephase.[3]

This rapid dephasing forces engineers to drive multiple qubits in parallel, but doing so previously caused a collapse in accuracy. When multiple silicon spin qubits shared a control line, gate fidelities would reliably degrade from above 99.9 percent down to around 99.5 percent. That drop pushes the hardware below the practical fault-tolerant threshold.[3]

Below that 99.9 percent threshold, the overhead required for surface-code error correction becomes mathematically unworkable. The RIKEN-led team traced this fidelity loss to a phenomenon known as the AC-Stark shift. They discovered that off-resonant microwave control signals were changing the effective energy levels of neighboring qubits, causing unwanted shifts in their quantum phase.[3][4]

"In a five-qubit silicon spin array, we identify microwave-drive-induced AC Stark shifts as the dominant source of this degradation," the researchers wrote in their published paper. Because quantum operations depend on precise phase relationships, unnoticed phase changes are highly destructive. A rotation applied after a phase shift pushes the qubit along the wrong trajectory, generating a computational error.[5]

Calibrating the Phase Shifts

To solve the interference, the team proved that these microwave-induced phase shifts accumulate linearly. This mathematical property allowed them to develop a scalable pairwise phase-calibration protocol. By measuring the phase accumulation between individual pairs of qubits, they could apply tailored control pulses to offset the frequency shifts across the entire array.[1][3]

This pairwise approach avoids the exponential computing overhead that would normally be required to characterize crosstalk in a large quantum system. For an array of a given size, the calibration scales efficiently, requiring only a manageable number of pairwise measurements. The resulting precision, measured through randomized benchmarking, set new records for silicon spin qubits.[3][4]

When operated individually using the new calibration, each of the five qubits achieved single-qubit gate fidelities above 99.99 percent. The best-performing qubit in the array approached an accuracy of 99.999 percent. These baseline numbers established that the tailored microwave pulses were successfully executing primitive quantum gates without introducing baseline errors.[3][5]

The critical test occurred when the team began driving multiple qubits through the single shared microwave line. When up to three qubits were operated simultaneously, the gate fidelities remained above the 99.99 percent mark. The calibration protocol successfully suppressed the AC-Stark shifts that had previously derailed parallel operations in silicon devices.[4][5]

Running all five qubits together produced the ultimate benchmark. During fully parallel five-qubit operation, the array maintained simultaneous single-qubit gate fidelities at or above 99.9 percent. While this represents a slight drop from the three-qubit test, it successfully crosses the minimum fidelity requirement for two-dimensional surface code quantum error correction.[3][5]

Managing Microwave Power

The researchers attributed the remaining degradation during the five-qubit run to drive-induced decoherence rather than phase shifts. Operating all five qubits simultaneously requires increased microwave power, which introduces a loss of quantum coherence that the phase-calibration protocol cannot fix. "This effect can be mitigated through device-level improvements," the team noted.[4][5]

High-fidelity single-qubit gates in the current device require relatively high microwave amplitudes, which generate heat and limit how many qubits can be driven at once. To address this in future iterations, the researchers proposed modifying the geometry of the micromagnets used in the array. These magnets provide the transverse magnetic field gradient necessary for spin control.[5]

Simulations project a twofold increase in the driving field gradient by halving the lithographically defined gap in the micromagnet structure to 200 nanometers. This design change requires bringing the qubits closer to the magnet. The hardware adjustment would allow the processor to achieve equivalent gate speeds using only half the microwave power, directly reducing drive-induced decoherence.[5]

Lowering the power requirement is essential for scaling the architecture beyond five qubits. The engineering challenge of routing individual control electronics into cryogenic environments has long been recognized as a hard physical limit on qubit counts. A single shared control line that can drive dozens of qubits without sacrificing fidelity changes the scaling math entirely.[2][5]

The Path to Scalability

Decoupled measurement sequences during the experiment also confirmed that residual exchange interactions between neighboring quantum dots remained extremely low. These interactions stayed below 16.6 kilohertz during single-qubit driving. This low residual exchange proves that the qubits can be packed tightly together without their baseline magnetic states interfering during active computation.[3]

The demonstration bridges a critical gap between isolated laboratory devices and scalable processors. The semiconductor industry has long envisioned these CMOS-compatible quantum architectures. By proving that crosstalk can be suppressed enough to maintain fault-tolerant fidelity on each site, the RIKEN team has validated a core hardware requirement.[1][4]

Extending this shared-line technique to larger arrays and integrating fast two-qubit gates remain the next open challenges for the research group. However, the ability to multiplex control signals without breaking quantum coherence provides a viable blueprint for the next generation of silicon quantum chips. The physical wiring ceiling has been significantly raised.[1]